1. Field of the Invention
The present invention relates to programmed logic arrays and more particularly to a 2-bit partitioning circuit for a dynamic, programmed logic array.
2. Description of the Prior Art
The programmed logic arrays (PLA's) are read-only structures that are programmed to perform both sequential and combinational logic. The combinational logic is implemented by means of sum-of-product functions as performed by AND arrays and OR arrays in cascade. The sequential logic is achieved by means of storage elements in the form of flip-flips or registers that may be driven in either a set/reset or toggle mode as a function of the pattern stored in a portion of the OR array. The feedback register is connected to internal inputs to the AND array through a feedback path that is internal to the PLA chip.
The PLA has basically a table look-up structure, where the AND array forms the look-up library and the OR array forms the resultant output for the operation. The AND array consists of many product terms (words) and is partitioned into two sections: the external field and the feedback field from the feedback register. Both of these fields are processed in parallel in the AND array to select words in the OR array. The OR array performs the logical OR operation on the values written in the selected words. The OR array is also partitioned into two fields: one field is gated to the external outputs, the other operates on the feedback register.
The total function of an array may be thought of as a sum-of-product expression. Because the product formation is done in the decoder, that part of the array is termed the AND or SEARCH array. Similarly, as the summing is done in what for a conventional memory would be the bit pattern, that part is termed the OR or READ array. In a conventional PLA, the true and complement values of the primary inputs are provided to the SEARCH or AND array. Thus, for two primary inputs A and B, the signals A, A, B and B are formed as inputs to the SEARCH array. Suppose that the input signals to the SEARCH array were defined as
Un = An + Bn PA1 Vn = An + Bn PA1 Xn = An + Bn PA1 Yn = An + Bn.
Providing such signals implements 2-bit partitioning. The extension of arrays by means of 2-bit partitioning generally provides more efficient implementation of functions by reducing the number of array product terms required.